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1 for more information www.linear.com/LT6119-1 typical a pplica t ion fea t ures descrip t ion current sense amplifier, reference and comparators with por the lt ? 6119 is a complete high side current sense device that incorporates a precision current sense amplifier, an integrated voltage reference and two latching comparators. tw o versions of the lt6119 are available. the LT6119-1 has the comparators connected in opposing polarity and the lt6119-2 has the comparators connected in the same polarity. the comparator latch functionality can be enabled or disabled and the comparators can be configured to reset upon power-on. the input and the open-drain outputs of the comparators are independent from the current sense amplifier. the comparator trip points and amplifier gain are configured with external resistors. the overall propagation delay of the lt6119 is typically only 1.4 s, allowing for quick reaction to overcurrent and undercurrent conditions. the 1 mhz bandwidth allows the lt6119 to be used for error detection in critical applica - tions such as motor control. the high threshold accuracy of the comparators, combined with the ability to latch both comparators, ensures the lt6119 can capture high speed events. the lt6119 is fully specified for operation from C40c to 125c , making it suitable for industrial and automo - tive applications . the lt6119 is available in a small 10-lead msop . fast acting fault protection with power-on reset and early warning a pplica t ions n current sense amplifier C fast step response: 500ns C low offset voltage: 200v maximum C low gain error: 0.2% maximum n internal 400mv precision reference n internal latching comparators C power-on reset capability C fast response time: 500ns C total threshold error: 1.25% maximum C tw o comparator polarity options n wide supply range: 2.7v to 60v n supply current: 550a n specified for C40c to 125c temperature range n available in 10-lead msop package n overcurrent, undercurrent and fault detection n current shunt measurement n battery monitoring n motor control n automotive monitoring and control n industrial control l, lt , lt c , lt m , timerblox, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. response to overcurrent event sensehi senselo outa lt6119-2 inc2 inc1 2n2700 100ma warning 250ma disconnect *cmh25234b v + le outc1 outc2 v ? 0.1 irf9640 3.3v 6.2v* 12v 100 6.04k 100k 1.62k10k 1k 1k 0.1f v out 2.37k 1.6k 611912 ta01a to load 24.9k 100nf 5s/div v load 10v/div v outc1 5v/div i load 200ma/div 0v 0v v outc2 5v/div 0v 0ma 611912 ta01b 250ma disconnect 100ma warning 611912f lt 6119-1/lt 6119-2
2 for more information www.linear.com/LT6119-1 p in c on f igura t ion a bsolu t e maxi m u m r a t ings total supply voltage (v + to v C ) ................................. 60 v ma ximum voltage ( senselo , sensehi , outa ) ............................... v + + 1v maximum v + C ( senselo or sensehi ) .................... 33 v m aximum le voltage ................................................ 60 v m aximum comparator input voltage ........................ 60 v m aximum comparator output voltage ...................... 60 v input current ( note 2) .......................................... C 10 ma sensehi , senselo input current ....................... 1 0 ma differential sensehi or senselo input current ... 2.5 ma amplifier output short - circuit duration ( to v C ) .. indefinite o perating temperature range ( note 3) lt 611 9 i ................................................ C 40 c to 85 c lt 611 9 h ............................................. C 40 c to 125 c specified temperature range ( note 3) lt 611 9 i ................................................ C 40 c to 85 c lt 611 9 h ............................................. C 40 c to 125 c maximum junction temperature .......................... 15 0 c storage temperature range .................. C 65 c to 150 c lead temperature ( soldering , 10 sec ) ................... 30 0 c (note 1) 1 2 3 4 5 senselo le outc2 outc1 v ? 10 9 8 7 6 sensehi v + outa inc2 inc1 top view ms package 10-lead plastic msop ja = 160c/w, jc = 45c/w o r d er i n f or m a t ion lead free finish tape and reel part marking* package description specified temperature range lt6119ims-1#pbf lt6119ims-1#trpbf ltgnv 10-lead plastic msop C40c to 85c lt6119hms-1#pbf lt6119hms-1#trpbf ltgnv 10-lead plastic msop C40c to 125c lt6119ims-2#pbf lt6119ims-2#trpbf ltgnw 10-lead plastic msop C40c to 85c lt6119hms-2#pbf lt6119hms-2#trpbf ltgnw 10-lead plastic msop C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 611912f lt 6119-1/lt 6119-2
3 for more information www.linear.com/LT6119-1 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) symbol parameter conditions min typ max units v + supply voltage range l 2.7 60 v i s supply current (note 4) v + = 2.7v, r in = 1k, v sense = 5mv 475 a v + = 60v, r in = 1k, v sense = 5mv l 600 700 1000 a a le pin current v le = 0v, v + = 60v C100 na v ih le pin input high v + = 2.7v to 60v l 1.5 v v il le pin input low v + = 2.7v to 60v l 0.5 v current sense amplifier v os input offset voltage v sense = 5mv v sense = 5mv l C200 C300 200 300 v v ?v os /?t input offset voltage drift v sense = 5mv l 0.8 v/c i b input bias current (senselo, sensehi) v + = 2.7v to 60v l 60 300 350 na na i os input offset current v + = 2.7v to 60v 5 na i outa output current (note 5) l 1 ma psrr power supply rejection ratio (note 6) v + = 2.7v to 60v l 120 114 127 db db cmrr common mode rejection ratio v + = 36v, v sense = 5mv, v icm = 2.7v to 36v 125 db v + = 60v, v sense = 5mv, v icm = 27v to 60v l 110 103 125 db db v sense(max) full-scale input sense voltage (note 5) r in = 500 l 500 mv gain error (note 7) v + = 2.7v to 12v v + = 12v to 60v, v sense = 5mv to 100mv l C0.2 C0.08 0 % % senselo v oltage (note 8) v + = 2.7v, v sense = 100mv, r out = 2k v + = 60v, v sense = 100mv l l 2.5 27 v v output swing high (v + to v outa ) v + = 2.7v, v sense = 27mv l 0.2 v v + = 12v, v sense = 120mv l 0.5 v bw signal bandwidth i out = 1ma i out = 100a 1 140 mhz khz t r input step response (to 50% of final output voltage) v + = 2.7v, v sense = 24mv step, output rising edge v + = 12v to 60v, v sense = 100mv step, output rising edge 500 500 ns ns t settle settling time to 1% v sense = 10mv to 100mv, r out = 2k 2 s reference and comparator v th(r) (note 9) rising input threshold voltage (LT6119-1 comparator 1 lt6119-2 both comparators) v + = 2.7v to 60v l 395 400 405 mv v th(f) (note 9) falling input threshold voltage (LT6119-1 comparator 2) v + = 2.7v to 60v l 395 400 405 mv v hys v hys = v th(r) C v th(f) v + = 2.7v to 60v 3 10 15 mv comparator input bias current v inc1,2 = 0v, v + = 60v l C50 na v ol output low voltage i outc1,c2 = 500a, v + = 2.7v l 60 150 220 mv mv high to low propagation delay 5mv overdrive 100mv overdrive 3 0.5 s s 611912f lt 6119-1/lt 6119-2
4 for more information www.linear.com/LT6119-1 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) symbol parameter conditions min typ max units output fall time 0.08 s t reset reset time 0.5 s t rpw minimum le reset pulse width l 2 s note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: input and output pins have esd diodes connected to ground. the sensehi and senselo pins have additional current handling capability specified as sensehi, senselo input current. note 3: the lt6119i is guaranteed to meet specified performance from C40c to 85c. lt6119h is guaranteed to meet specified performance from C40c to 125c. note 4: supply current is specified with the comparator outputs high. when the comparator outputs go low the supply current will increase by 75a typically per comparator. note 5: the full-scale input sense voltage and the maximum output current must be considered to achieve the specified performance. note 6: supply voltage and input common mode voltage are varied while amplifier input offset voltage is monitored. note 7: specified gain error does not include the effects of external resistors r in and r out . although gain error is only guaranteed between 12v and 60v, similar performance is expected for v + < 12v, as well. note 8: refer to senselo, sensehi range in the applications information section for more information. note 9: the input threshold voltage which causes the output voltage of the comparator to transition from high to low is specified. the input voltage which causes the comparator output to transition from low to high is the magnitude of the difference between the specified threshold and the hysteresis. 611912f lt 6119-1/lt 6119-2
5 for more information www.linear.com/LT6119-1 performance characteristics taken at t a = 25c, v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) typical p er f or m ance c harac t eris t ics input offset voltage vs temperature amplifier offset voltage vs supply voltage offset voltage drift distribution amplifier gain error vs temperature amplifier gain error distribution supply current vs supply voltage start-up supply current supply voltage (v) 0 700 600 500 400 300 200 100 0 30 50 611912 g01 10 20 40 60 supply current (a) supply voltage (v) 0 ?100 offset voltage (v) ?60 ?20 20 10 20 30 40 611912 g04 50 60 100 ?80 ?40 0 40 80 60 5 typical units 0v v + 5v/div i s 500a/div 0a 10s/div 611912 g02 temperature (c) ?40 input offset voltage (v) 300 200 100 0 ?100 ?200 ?300 80 611912 g03 ?10 20 50 125110 65 ?25 5 35 95 5 typical units offset voltage drift (v/c) 6 8 12 611912 g05 4 2 0?0.5 0.5 ?1 1 1.5 2 ?1.5?2 0 10 percentage of units (%) temperature (c) ?50 ?25 ?0.20 gain error (%) ?0.10 0.05 0 50 75 611912 g06 ?0.15 0 ?0.05 25 100 125 r in = 1k r in = 100 v sense = 5mv to 100mv gain error (%) ?0.048 0 percentage of units (%) 5 15 20 25 v sense = 5mv to 100mv ?0.052 ?0.056 611912 g07 10 ?0.060 ?0.68 ?0.064 amplifier output swing vs temperature temperature (c) ?50 0 v + ? v outa (v) 0.05 0.15 0.20 0.25 0.50 0.35 0 50 75 611912 g08 0.10 0.40 0.45 0.30 ?25 25 100 125 v + = 12v v sense = 120mv v + = 2.7v v sense = 27mv 611912f lt 6119-1/lt 6119-2
6 for more information www.linear.com/LT6119-1 performance characteristics taken at t a = 25c, v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) amplifier input bias current vs temperature amplifier step response (v sense = 0mv to 100mv) amplifier step response (v sense = 0mv to 100mv) amplifier step response (v sense = 10mv to 100mv) amplifier step response (v sense = 10mv to 100mv) amplifier gain vs frequency system step response common mode rejection ratio vs frequency typical p er f or m ance c harac t eris t ics frequency (hz) 1 0 common mode rejection ratio (db) 120 100 140 10 100 1k 10k 100k 1m 10m 611912 g10 80 60 40 20 frequency (hz) 22 gain (db) 28 34 40 46 1k 100k 1m 10m 611912 g11 16 10k i outa = 1ma i outa = 100a g = 100 g = 50, r out = 5k g = 20, r out = 2k 0v v sense 100mv/div v outa 1v/div v outc1 2v/div v le 5v/div 0v 0v 0v 611912 g12 2s/div r out = 2k,100mv inc1 overdrive temperature (c) ?25 input bias current (na) 60 80 100 95 611912 g13 40 20 50 70 90 30 10 0 5 35 65 ?10?40 110 20 50 80 125 sensehi senselo v outa 2v/div v sense 50mv/div 0v 0v 611912 g14 2s/div r in = 100 g = 100v/v v outa 2v/div v sense 50mv/div 0v 0v 611912 g15 2s/div r in = 100 g = 100v/v 0v 0v v outa 1v/div v sense 100mv/div 611912 g16 2s/div r in = 1k r out = 20k g = 20v/v 0v 0v v outa 1v/div v sense 100mv/div 611912 g17 2s/div r in = 1k r out = 20k g = 20v/v power supply rejection ratio vs frequency frequency (hz) 1 0 power supply rejection ratio (db) 120 100 140 160 10 100 1k 10k 100k 1m 10m 611912 g09 80 60 40 20 611912f lt 6119-1/lt 6119-2
7 for more information www.linear.com/LT6119-1 performance characteristics taken at t a = 25c, v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) hysteresis distribution hysteresis vs temperature hysteresis vs supply voltage comparator input bias current vs input voltage comparator input bias current vs input voltage comparator threshold distribution comparator threshold vs temperature le current vs voltage comparator output low voltage vs output sink current comparator input voltage (v) ?20 comparator input bias current (na) ?10 0 10 ?15 ?5 5 20 40 611912 g24 60 0 125c 25c ?40c comparator input voltage (v) ?20 comparator input bias current (na) ?10 0 10 ?15 ?5 5 0.2 0.4 0.6 0.8 611912 g25 1.0 0 125c 25c ?40c 0 0 v ol outc1, outc2 (v) 0.25 0.50 0.75 1.00 1 i outc (ma) 2 611912 g26 3 125c 25c ?40c typical p er f or m ance c harac t eris t ics temperature (c) ?40 ?25 comparator threshold (mv) 398 400 402 50 110 611912 g19 396 394 392 ?10 5 20 35 80 65 125 95 404 406 408 5 typical parts comparator hysteresis (mv) 3.0 0 percentage of units (%) 5 10 15 20 30 ?40c 25c 125c 4.6 6.2 7.7 9.3 10.9 12.5 14.1 610912 g20 15.7 17.3 25 v + (v) 0 14 12 10 8 6 4 2 0 30 50 611912 g22 10 20 40 60 comparator hysteresis (mv) 5 typical parts le voltage (v) 0 ?125 le current (na) ?100 ?75 ?50 ?25 25 10 20 30 40 611912 g23 50 60 0 v + = 12v comparator threshold (mv) 0 percentage of units (%) 5 15 20 25 399.2 404 611912 g18 10 396 397.6 400.8 402.8 temperature (c) ?40 comparator hysteresis (mv) 20 18 16 14 12 10 8 6 4 0 2 80 611912 g21 ?10 20 50 125110 65 ?25 5 35 95 611912f lt 6119-1/lt 6119-2
8 for more information www.linear.com/LT6119-1 comparator rise/fall time vs pull-up resistor comparator step response (5mv inc1 overdrive) comparator step response (100mv inc1 overdrive) comparator reset response comparator propagation delay vs input overdrive comparator output leakage current vs pull-up voltage comparator output pull-up voltage (v) 0 ?2 outc1, outc2 leakage current (na) 3 8 13 18 23 125c 10 20 30 40 611912 g27 50 60 ?40c and 25c r c pull-up resistor (k) 1 10 rise/fall time (ns) 100 1000 10000 10 100 1000 611912 g29 rise time fall time v oh = 0.9 ? v pullup v ol = 0.1 ? v pullup 100mv inc1 overdrive c l = 2pf v inc 0.5v/div 0v v outc 2v/div 0v v le 5v/div 0v 611912 g30 5s/div 0v v inc 0.5v/div v outc 2v/div v le 5v/div 0v 0v 611912 g31 5s/div 0v v outc 5v/div v le 2v/div 0v 5s/div 611912 g32 performance characteristics taken at t a = 25c, v + = 12v, v pullup = v + , v le = 2.7v, r in = 100, r out = r1 + r2 + r3 = 10k, gain = 100, r c = 25.5k, c l = c lc = 2pf, unless otherwise noted. (see figure 3) typical p er f or m ance c harac t eris t ics comparator input overdrive (mv) 0 comparator propagation delay (s) 3.0 4.0 5.0 160 611912 g28 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 40 80 120 200 h to l l to h 611912f lt 6119-1/lt 6119-2
9 for more information www.linear.com/LT6119-1 p in func t ions senselo (pin 1): sense amplifier input. this pin must be tied to the load end of the sense resistor. le (pin 2): latch control pin. when high, the comparator latch is enabled. with the comparator latch enabled, the comparator output will latch at a low level once tripped. when the le input is low, the comparator latch is disabled and the comparator functions transparently. outc2 (pin 3): open-drain comparator 2 output. off- state voltage may be as high as 60 v above v C , regardless of v + used. outc1 (pin 4): open-drain comparator 1 output. off- state voltage may be as high as 60 v above v C , regardless of v + used. v C (pin 5): negative supply pin. this pin is normally con- nected to ground. inc 1 ( pin 6): inverting input of comparator 1. the second input of this comparator is internally connected to the 400mv reference. inc2 (pin 7): input of comparator 2. for the LT6119-1 this is the noninverting input of comparator 2. for the lt6119-2 this is the inverting input of comparator?2. the second input of each of these comparators is internally connected to the 400mv reference. outa (pin 8): current output of the sense amplifier. this pin will source a current that is equal to the sense voltage divided by the external gain setting resistor, r in . v + (pin 9): positive supply pin. the v + pin can be con- nected directly to either side of the sense resistor, r sense . when v + is tied to the load end of the sense resistor, the sensehi pin can go up to 0.2 v above v + . supply current is drawn through this pin. sensehi (pin 10): sense amplifier input. the internal sense amplifier will drive sensehi to the same potential as senselo. a resistor ( typically r in ) tied from supply to sensehi sets the output current, i out = v sense /r in , where v sense is the voltage developed across r sense . 611912f lt 6119-1/lt 6119-2
10 for more information www.linear.com/LT6119-1 b lock diagra m s figure 1. LT6119-1 block diagram (comparators with opposing polarity) 100 outa ? + ? + 9 10 1 8 inc2 7 inc1 611912 f01 6 v + v ? v ? v ? v ? v + 3k v + 3k sensehi LT6119-1 senselo 100na undercurrent flag overcurrent flag 2 le 3 outc2 4 outc1 34v 6v ? + v ? v + 5 400mv reference 611912f lt 6119-1/lt 6119-2
11 for more information www.linear.com/LT6119-1 b lock diagra ms figure 2. lt6119-2 block diagram (comparators with the same polarity) 100 outa ? + ? + 9 10 1 8 inc2 7 inc1 611912 f02 6 v + v ? v ? v ? v + 3k v + 3k sensehi lt6119-2 senselo 100na overcurrent flag overcurrent flag 2 le 3 outc2 4 outc1 34v 6v ? + v ? v + 5 400mv reference v ? 611912f lt 6119-1/lt 6119-2
12 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion the lt6119 high side current sense amplifier provides accurate monitoring of currents through an external sense resistor. the input sense voltage is level-shifted from the sensed power supply to a ground referenced output and is amplified by a user-selected gain to the output. the output voltage is directly proportional to the current flowing through the sense resistor. the lt6119 comparators have a threshold set with a built-in 400 mv precision reference and have 10 mv of hysteresis. the open-drain outputs can be easily used to level shift to digital supplies. amplifier theory of operation an internal sense amplifier loop forces sensehi to have the same potential as senselo, as shown in figure 3. connecting an external resistor, r in , between sensehi and v supply forces a potential, v sense , across r in . a corresponding current, i outa , equal to v sense /r in , will flow through r in . the high impedance inputs of the sense amplifier do not load this current, so it will flow through an internal mosfet to the output pin, outa. the output current can be transformed back into a voltage by adding a resistor from outa to v C (typically ground). the output voltage is then: v out = v C + i outa ? r out where r out = r1 + r2 + r3, as shown in figure 3. table 1. example gain configurations gain r in r out v sense for v out = 5v i outa at v out = 5v 20 499 10k 250mv 500a 50 200 10k 100mv 500a 100 100 10k 50mv 500a useful equations input voltage: v sense = i sense ? r sense voltage gain: v out v sense = r out r in current gain: i outa i sense = r sense r in note that v sense(max) can be exceeded without damaging the amplifier, however, output accuracy will degrade as v sense exceeds v sense( max) , resulting in increased output current, i outa . selection of external current sense resistor the external sense resistor, r sense , has a significant effect on the function of a current sensing system and must be chosen with care. first, the power dissipation in the resistor should be considered. the measured load current will cause power dissipation as well as a voltage drop in r sense . as a result, the sense resistor should be as small as possible while still providing the input dynamic range required by the measurement. note that the input dynamic range is the difference between the maximum input signal and the minimum accurately reproduced signal, and is limited pri - marily by input dc offset of the internal sense amplifier of the lt6119. to ensure the specified performance, r sense should be small enough that v sense does not exceed v sense(max) under peak load conditions. as an example, an application may require the maximum sense voltage be 100 mv. if this application is expected to draw 2 a at peak load, r sense should be set to 50m. once the maximum r sense value is determined, the mini- mum sense resistor value will be set by the resolution or dynamic range required. the minimum signal that can be accurately represented by this sense amplifier is limited by the input offset. as an example, the lt6119 has a maximum input offset of 200 v. if the minimum current is 20 ma, a sense resistor of 10 m will set v sense to 200 v. this is the same value as the input offset. a larger sense resis- tor will reduce the error due to offset by increasing the sense voltage for a given load current. choosing a 50m r sense will maximize the dynamic range and provide a system that has 100 mv across the sense resistor at peak load (2 a), while input offset causes an error equivalent to only 4ma of load current. in the previous example, the peak dissipation in r sense is 200 mw. if a 5 m sense resistor is employed, then the effective current error is 40 ma, while the peak sense voltage is reduced to 10 mv at 2 a, dissipating only 20mw. 611912f lt 6119-1/lt 6119-2
13 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion the low offset and corresponding large dynamic range of the lt6119 make it more flexible than other solutions in this respect. the 200 v maximum offset gives 68db of dynamic range for a sense voltage that is limited to 500 mv max. sense resistor connection kelvin connection of the sensehi and senselo inputs to the sense resistor should be used in all but the lowest power applications. solder connections and pc board interconnections that carry high currents can cause sig - nificant error in measurement due to their relatively large figure 3. LT6119-1 typical connection outa i outa ? + ? + v + c1 sensehi inc2 inc1 5 4 3 2 1 r1* 611912 f03 v ? v + v + v ? LT6119-1 senselo le outc2 v le r c v pullup load v supply v sense r sense undercurrent flag overcurrent flag r in + ? outc1 *r out = r1 + r2 + r3 ? + v ? v ? v + i sense = v sense r sense r c r2* 6 7 8 9 10 r3* c l v out 400mv reference c lc c lc resistances. one 10mm 10mm square trace of 1 oz copper is approximately 0.5 m. a 1 mv error can be caused by as little as 2 a flowing through this small interconnect. this will cause a 1% error for a full-scale v sense of 100 mv. a 10a load current in the same interconnect will cause a 5% error for the same 100 mv signal. by isolating the sense traces from the high current paths, this error can be reduced by orders of magnitude. a sense resistor with integrated kelvin sense terminals will give the best results. figure 3 illustrates the recommended method for connecting the sensehi and senselo pins to the sense resistor. 611912f lt 6119-1/lt 6119-2
14 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion selection of external input gain resistor, r in r in should be chosen to allow the required speed and resolution while limiting the output current to 1 ma. the maximum value for r in is 1 k to maintain good loop sta- bility. for a given v sense , larger values of r in will lower power dissipation in the lt6119 due to the reduction in i out while smaller values of r in will result in faster response time due to the increase in i out . if low sense currents must be resolved accurately in a system that has a very wide dynamic range, a smaller r in may be used if the maximum i outa current is limited in another way, such as with a schottky diode across r sense (figure 4). this will reduce the high current measurement accuracy by limiting the result, while increasing the low current measurement resolution. as a resistor divider which has voltage taps going to the comparator inputs to set the comparator thresholds. in choosing an output resistor, the maximum output volt - age must first be considered. if the subsequent circuit is a buffer or adc with limited input range, then r out must be chosen so that i outa(max) ? r out is less than the allowed maximum input range of this circuit. in addition, the output impedance is determined by r out . if another circuit is being driven, then the input imped- ance of that circuit must be considered. if the subsequent cir cuit has high enough input impedance, then almost any useful output impedance will be acceptable. however, if the subsequent circuit has relatively low input impedance, or draws spikes of current such as an adc load, then a lower output impedance may be required to preserve the accuracy of the output. more information can be found in the output filtering section. as an example, if the input impedance of the driven circuit, r in(driven) , is 100 times r out , then the accuracy of v out will be reduced by 1% since: v out = i outa ? r out ? r in(driven) r out + r in(driven) = i outa ? r out ? 100 101 = 0.99 ?i outa ? r out amplifier error sources the current sense system uses an amplifier and resistors to apply gain and level-shift the result. consequently, the output is dependent on the characteristics of the amplifier, such as gain error and input offset, as well as the matching of the external resistors. ideally, the circuit output is: v out = v sense ? r out r in ; v sense = r sense ? i sense in this case, the only error is due to external resistor mismatch, which provides an error in gain only. however, offset voltage, input bias current and finite gain in the amplifier can cause additional errors: d sense r sense v + load 611912 f04 figure 4. shunt diode limits maximum input voltage to allow better low input resolution without overranging this approach can be helpful in cases where occasional bursts of high currents can be ignored. care should be taken when designing the board layout for r in , especially for small r in values. all trace and inter- connect resistances will increase the effective r in value, causing a gain error. the power dissipated in the sense resistor can create a thermal gradient across a printed circuit board and con - sequently a gain error if r in and r out are placed such that they operate at different temperatures. if significant power is being dissipated in the sense resistor then care should be taken to place r in and r out such that the gain error due to the thermal gradient is minimized. selection of external output gain resistor, r out the output resistor, r out , determines how the output cur- rent is converted to voltage. v out is simply i outa ? r out . typically, r out is a combination of resistors configured 611912f lt 6119-1/lt 6119-2
15 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion for instance, if i bias is 100 na and r in is 1 k, the input re- ferred error is 100 v. this error becomes less significant as the value of r in decreases. the bias current error can be reduced if an external resistor, r in + , is connected as shown in figure 5, the error is then reduced to: v out(ibias) = r out ? i os ; i os = i b + C i b C minimizing low current errors will maximize the dynamic range of the circuit. output voltage error, ?v out(gain error) , due to external resistors the lt6119 exhibits a very low gain error. as a result, the gain error is only significant when low tolerance resistors are used to set the gain. note the gain error is systematically negative. for instance, if 0.1% resistors are used for r in and r out then the resulting worst-case gain error is C0.4% with r in = 100. figure 6 is a graph of the maximum gain error which can be expected versus the external resistor tolerance. output voltage error, ?v out(vos) , due to the amplifier dc offset voltage, v os ? v out(vos) = v os ? r out r in the dc offset voltage of the amplifier adds directly to the value of the sense voltage, v sense . as v sense is increased, accuracy improves. this is the dominant error of the system and it limits the available dynamic range. output voltage error, ?v out(ibias) , due to the bias currents i b + and i b C the amplifier bias current i b + flows into the senselo pin while i b C flows into the sensehi pin. the error due to i b is the following: ?v out(ibias) = r out i b + ? r sense r in C i b C ? ? ? ? ? ? since i b + i b C = i bias , if r sense << r in then, ? v out(ibias) = Cr out (i bias ) it is useful to refer the error to the input: ? v vin(ibias) = Cr in (i bias ) figure 6. gain error vs resistor tolerance sensehi lt6119 i sense r sense v + 9 v ? 5 v + r in v batt senselo 10 1 outa 8 611912 f05 r out v out r in + ? + figure 5. r in + reduces error due to i b resistor tolerance (%) 0.01 0.01 resulting gain error (%) 0.1 1 10 0.1 1 10 611912 f06 r in = 100 r in = 1k 611912f lt 6119-1/lt 6119-2
16 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion number can be multiplied by the ja value , 160 c/w, to find the maximum expected die temperature. proper heat sinking and thermal relief should be used to ensure that the die temperature does not exceed the maximum rating. le pin the le pin is used to enable the comparators output latch . when the le pin is high, the output latch is enabled and the comparator outputs will stay low once tripped. when le is low, the comparator output latches are disabled and the comparators operate transparently. to continuously operate the comparators transparently, the le pin should be grounded. do not leave the le pin floating. power-on reset during start-up, the state of the comparator outputs can - not be guaranteed. to guarantee the correct state of the comparators outputs on start- up, a power- on reset ( por) is required. a por can be implemented by holding the le pin low until the lt6119 is in such a state that the comparator outputs are stable. this can be achieved by using an rc network between the le, v + and gnd, as shown in figure 7. when power is applied to the lt6119, the rc network causes the voltage on the le pin to remain below the v il (0.5v) threshold long enough for the comparator outputs to settle into the correct state. the le pin should remain below 0.5 v for at least 100 s after power-up in order to output current limitations due to power dissipation the lt6119 can deliver a continuous current of 1 ma to the outa pin. this current flows through r in and enters the current sense amplifier via the sensehi pin. the power dissipated in the lt6119 due to the output signal is: p out = (v sensehi C v outa ) ? i outa since v sensehi v + , p outa (v + C v outa ) ? i outa there is also power dissipated due to the quiescent power supply current: p s = i s ? v + the comparator output current flows into the comparator output pin and out of the v C pin. the power dissipated in the lt6119 due to each comparator is often insignificant and can be calculated as follows: p outc1,c2 = (v outc1,c2 C v C ) ? i outc1,c2 the total power dissipated is the sum of these dissipations : p total = p outa + p outc1 + p outc2 + p s at maximum supply and maximum output currents, the total power dissipation can exceed 100 mw. this will cause significant heating of the lt6119 die. in order to prevent damage to the lt6119, the maximum expected dissipation in each application should be calculated. this figure 7. rc network achieves power-on reset le lt6119 r 110k 60v v + v le c 0.1f 611912 f07 611912f lt 6119-1/lt 6119-2
17 for more information www.linear.com/LT6119-1 guarantee a valid comparator outputs. the rc value can be determined with the following equation: rc = t ln v + v + ? 0.5v ? ? ? ? ? ? ; t 100s the rc will need to be chosen based on the supply voltage of the circuit. figure 8 can be used to easily determine an appropriate rc combination for an applications supply voltage range. a pplica t ions i n f or m a t ion figure 9. v + powered separately from load supply (v b att ) figure 8. minimum resistance for three typical capacitor values figure 10. allowable senselo, sensehi voltage range sensehi lt6119 i sense r sense v + 9 v ? 5 v + r in v batt senselo 10 1 outa 8 611912 f09 r out v out ? + 60 50 40 30 20 20.2v 40.2v 10 27 allowable operating voltages on senselo and sensehi inputs (v) 2.8v 2.5v 2.7 10 20 30 35.5 40 50 v + (v) 60 611912 f10 valid senselo/ sensehi range senselo, sensehi range the difference between v batt (see figure 9) and v + , as well as the maximum value of v sense , must be consid- ered to ensure that the senselo pin does not exceed the range listed in the electrical characteristics table. the senselo and sensehi pins of the lt6119 can function from 0.2 v above the positive supply to 33 v below it. these operating voltages are limited by internal diode clamps shown in figures 1 and 2. on supplies less than 35.5v, the lower range is limited by v C + 2.5 v. this allows the monitored supply, v batt , to be separate from the lt6119 positive supply, as shown in figure 9. figure 10 shows the range of operating voltages for the senselo and sensehi inputs, for different supply voltage inputs (v + ). supply voltage (v) 1 10 100 resistor value () 611912 f08 c = 100nf c = 10nf c = 1nf 100,000,000 10,000,000 1,000,000 100,000 10,000 1000 output filtering the ac output voltage, v out , is simply i outa ? z out . this makes filtering straightforward. any circuit may be used which generates the required z out to get the desired filter response. for example, a capacitor in parallel with r out will give a lowpass response. this will reduce noise at the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit such as a mux or adc. this output capacitor in parallel with r out will create an output pole at: f C3db = 1 2 ? ?r out ?c l 611912f lt 6119-1/lt 6119-2
18 for more information www.linear.com/LT6119-1 the senselo and sensehi range has been designed to allow the lt6119 to monitor its own supply current (in addition to the load), as long as v sense is less than 200 mv. this is shown in figure 11. minimum output v oltage the output of the lt6119 current sense amplifier can produce a non-zero output voltage when the sense voltage is zero. this is a result of the sense amplifier v os being forced across r in as discussed in the output voltage er- ror, ?v out(vos) section. figure 12 shows the effect of the input offset voltage on the transfer function for parts at the v os limits. with a negative offset voltage, zero input sense voltage produces an output voltage. with a positive offset voltage, the output voltage is zero until the input sense voltage exceeds the input offset voltage. neglecting v os , the output circuit is not limited by saturation of pull-down circuitry and can reach 0v. a pplica t ions i n f or m a t ion response time the lt6119 amplifier is designed to exhibit fast response to inputs for the purpose of circuit protection or current monitoring. this response time will be affected by the external components in two ways, delay and speed. if the output current is very low and an input transient occurs, there may be an increased delay before the output voltage begins to change. the typical performance characteristics show that this delay is short and it can be improved by increasing the minimum output current, either by increasing r sense or decreasing r in . note that the typical performance characteristics are labeled with respect to the initial sense voltage. the speed is also affected by the external components. using a larger r out will decrease the response time, since v out = i outa ? z out where z out is the parallel combination figure 12. amplifier output voltage vs input sense voltage input sense voltage (v) 0 output voltage (mv) 40 80 120 20 60 100 200 400 600 800 611912 f12 1000 1000 300 500 700 900 v os = ?200v v os = 200v g = 100 figure 11. lt6119 supply current monitored with load sensehi lt6119 i sense r sense v + 9 v ? 5 r in v batt senselo 10 1 outa 8 611912 f11 r out v out ? + 611912f lt 6119-1/lt 6119-2
19 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion of r out and any parasitic and/or load capacitance. note that reducing r in or increasing r out will both have the effect of increasing the voltage gain of the circuit. if the output capacitance is limiting the speed of the system, r in and r out can be decreased together in order to maintain the desired gain and provide more current to charge the output capacitance. the response time of the comparators is the sum of the propagation delay and the fall time. the propagation de - lay is a function of the overdrive voltage on the input of the comparators. a larger overdrive will result in a lower propagation delay. this helps achieve a fast system re - sponse time to fault events. the fall time is affected by the load on the output of the comparator as well as the pull-up voltage. the lt6119 amplifier has a typical response time of 500ns and the comparators have a typical response time of 500 ns . when configured as a system, the amplifier output drives the comparator input causing a total system response time which is typically greater than that implied by the individually specified response times. this is due to the overdrive on the comparator input being determined by the speed of the amplifier output. internal reference and comparators the integrated precision reference and comparators combined with the high precision current sense allow for rapid and easy detection of abnormal load currents. this is often critical in systems that require high levels of safety and reliability. the lt6119 comparators are opti - mized for fault detection and are designed with latching outputs. latching outputs prevent faults from clearing themselves and require a separate system or user to reset the outputs. in applications where the compara - tor output can intervene and disconnect loads from the supply, latched outputs are required to avoid oscillation. latching outputs are also useful for detecting problems that are intermittent. the comparator outputs on the lt6119 are always latching and there is no way to disable this feature. each of the comparators has one input available externally, with the two versions of the part differing by the polarity of those available inputs. the other comparator inputs are connected internally to the 400 mv precision reference. the input threshold ( the voltage which causes the output to transition from high to low) is designed to be equal to that of the reference. the reference voltage is established with respect to the device v C connection. comparator inputs the comparator inputs can swing from v C to 60 v regardless of the supply voltage used. the input current for inputs well above the threshold is just a few pas. with decreas - ing input voltage, a small bias current begins to be drawn out of the input near the threshold, reaching 50 na max when at ground potential. note that this change in input bias current can cause a small nonlinearity in the outa transfer function if the comparator inputs are coupled to the amplifier output with a voltage divider. for example, if the maximum comparator input current is 50 na, and the resistance seen looking out of the comparator input is 1 k, then a change in output voltage of 50 v will be seen on the analog output when the comparator input voltage passes through its threshold. if both compara - tor inputs are connected to the output then they must both be considered. setting comparator thresholds the comparators have an internal precision 400 mv refer - ence. in order to set the trip points of the LT6119-1 com- parators, the output currents, i over and i under , as well as the maximum output current, i max , must be calculated: i over = v sense(over) r in , i under = v sense(under) r in , i max = v sense(max) r in where i over and i under are the over and under currents through the sense resistor which cause the comparators to trip. i max is the maximum current through the sense resistor. 611912f lt 6119-1/lt 6119-2
20 for more information www.linear.com/LT6119-1 depending on the desired maximum amplifier output volt- age (v max ) the three output resistors, r1, r2 and r3, can be configured in two ways. if: v max > 400mv i over + 400mv C i under r1 ( ) i under ? ? ? ? ? ? ? ? i max then use the configuration shown in figure 3. the desired trip points and full-scale analog output voltage for the circuit in figure 3 can then be achieved using the follow - ing equations: a pplica t ions i n f or m a t ion r1 = 400mv i over r2 = 400mv C i under r1 ( ) i under r3 = v max Ci max r1 + r2 ( ) i max if: v max < 400mv i over + 400mv C i under r1 ( ) i under ? ? ? ? ? ? i max then use the configuration shown in figure 13. figure 13. typical configuration with alternative r out configuration outa i outa ? + ? + v + c1 sensehi inc2 inc1 r1 611912 f13 v ? v + v + v ? LT6119-1 senselo le outc2 v le r c v pullup load v supply v sense r sense undercurrent flag overcurrent flag r in + ? outc14 3 2 1 5 ? + v ? v ? v + i sense = v sense r sense r c r2 6 7 8 9 10 r3 c l v out 400mv reference c lc c lc 611912f lt 6119-1/lt 6119-2
21 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion the desired trip points and full-scale analog output voltage for the circuit in figure 15 can be achieved as follows: r1 = 400mv i over r2 = v max C i max r1 ( ) i max r3 = 400mv C i under r1 + r2 ( ) i under trip points for the lt6119-2 can be set by replacing i under with a second overcurrent, i over2 . hysteresis each comparator has a typical built-in hysteresis of 10mv to simplify design, ensure stable operation in the pres - ence of noise at the inputs, and to reject supply noise that might be induced by state change load transients. the hysteresis is designed such that the threshold voltage is altered when the output is transitioning from low to high as is shown in figure 14. external positive feedback circuitry can be employed to increase the effective hysteresis if desired, but such circuitry will have an effect on both the rising and fall - ing input thresholds, v th ( the actual internal threshold remains unaffected). figure 15 shows how to add additional hysteresis to a noninverting comparator. r 6 can be calculated from the extra hysteresis being added , v hys(extra) and the amplifier output current which you want to cause the comparator output to trip, i under . note that the hysteresis being added, v hys(extra) , is in addition to the typical 10mv of built-in hysteresis. r6 = 400mv C v hys(extra) i under figure 14. comparator output transfer characteristics figure 15. noninverting comparator with added hysteresis v hys outc1 (LT6119-1/lt6119-2) outc2 (lt6119-2) outc2 (LT6119-1) v hys v th increasing v inc1,2 611912 f14 ? + v + v + v ? inc2 v ? 5 611912 f15 outa 7 8 v + v + sensehi 9 10 1 3 LT6119-1 r in r sense i load r3 v + senselo outc2 400mv reference r5 r6 r1 vth r2 + ? 611912f lt 6119-1/lt 6119-2
22 for more information www.linear.com/LT6119-1 r1 should be chosen such that r 1 >> r6 so that v outa does not change significantly when the comparator trips. r 3 should be chosen to allow sufficient v ol and compara- tor output rise time due to capacitive loading. r 2 can be calculated: r2 = r1? v + C 400mv ( ) C v hys(extra) ? r3 ( ) v hys(extra) for very large values of r2 pcb related leakage may become an issue. a tee network can be implemented to reduce the required resistor values. the approximate total hysteresis will be: v hys = 10mv + r1? v + C 400mv r2 + r3 ? ? ? ? ? ? for example, to achieve i under = 100 a with 50 mv of total hysteresis, r 6 = 3.57 k. choosing r1 = 35.7 k, r3 = 10k and v + = 5v results in r2 = 4.12m. the analog output voltage will also be affected when the comparator trips due to the current injected into r6 by the positive feedback. because of this, it is desirable to a pplica t ions i n f or m a t ion have (r1 + r2 + r3) >> r6. the maximum v outa error caused by this can be calculated as: ?v outa = v + ? r6 r1 + r2 + r3 + r6 ? ? ? ? ? ? in the previous example, this is an error of 4.3 mv at the output of the amplifier or 43 v at the input of the amplifier assuming a gain of 100. when using the comparators with their inputs decoupled from the output of the amplifier, they may be driven directly by a voltage source. it is useful to know the threshold voltage equations with the additional hysteresis. the input falling edge threshold which causes the output to transition from high to low is: v th(f) = 400mv ?r1? 1 r1 + 1 r2 + r3 ? ? ? ? ? ? C v + ? r1 r2 + r3 ? ? ? ? ? ? the input rising edge threshold which causes the output to transition from low to high is: v th(r) = 410mv ? r1? 1 r1 + 1 r2 ? ? ? ? ? ? figure 16 shows how to add additional hysteresis to an inverting comparator. figure 16. inverting comparator with added hysteresis ? + v + v + v ? inc1 v ? 5 611912 f16 outa 8 9 6 v + v + sensehi LT6119-1 r in r sense i load v + senselo outc14 1 10 400mv reference r3 r6 r7 r1 vth r2 v dd ? + 611912f lt 6119-1/lt 6119-2
23 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion r 7 can be calculated from the amplifier output current which is required to cause the comparator output to trip, i over . r7 = 400mv i over , assuming r1+ r2 ( ) >> r7 to ensure (r1 + r2) >> r7, r1 should be chosen such that r 1 >> r7 so that v outa does not change significantly when the comparator trips. r3 should be chosen to allow sufficient v ol and compara- tor output rise time due to capacitive loading. r 2 can be calculated: r2 = r1? v dd C 390mv v hys(extra) ? ? ? ? ? ? note that the hysteresis being added, v hys(extra) , is in addition to the typical 10 mv of built-in hysteresis. for very large values of r2 pcb related leakage may become an issue. a tee network can be implemented to reduce the required resistor values. the approximate total hysteresis is: v hys = 10mv + r1? v dd C 390mv r2 ? ? ? ? ? ? for example, to achieve i over = 900 a with 50 mv of total hysteresis, r 7 = 442. choosing r1 = 4.42 k, r3 = 10k and v dd = 5v results in r2 = 513k. the analog output voltage will also be affected when the comparator trips due to the current injected into r7 by the positive feedback. because of this, it is desirable to have (r1 + r2) >> r7. the maximum v outa error caused by this can be calculated as: ?v outa = v dd ? r7 r1 + r2 + r7 ? ? ? ? ? ? in the previous example, this is an error of 4.3 mv at the output of the amplifier or 43 v at the input of the amplifier assuming a gain of 100. since the comparators can be used independently of the current sense amplifier, it is useful to know the threshold voltage equations with additional hysteresis. the input rising edge threshold which causes the output to transi - tion from high to low is: v th(r) = 400mv ? 1 + r1 r2 ? ? ? ? ? ? the input falling edge threshold which causes the output to transition from low to high is: v th(f) = 390mv ? 1 + r1 r2 ? ? ? ? ? ? C v dd r1 r2 ? ? ? ? ? ? comparator outputs the comparator outputs can maintain a logic low level of 150mv while sinking 500 a. the outputs can sink higher currents at elevated v ol levels, as shown in the typical performance characteristics. load currents are conducted to the v C pin. the output off-state voltage may range between 0 v and 60 v with respect to v C , regardless of the supply voltage used. as with any open-drain device, the outputs may be tied together to implement wire-or logic functions. the LT6119-1 can be used as a single-output window comparator in this way. 611912f lt 6119-1/lt 6119-2
24 for more information www.linear.com/LT6119-1 a pplica t ions i n f or m a t ion reverse-supply protection the lt6119 is not protected internally from external rever- sal of supply polarity. to prevent damage that may occur during this condition, a schottky diode should be added in series with v C (figure 17). this will limit the reverse current through the lt6119. note that this diode will limit the low voltage operation of the lt6119 by effectively reducing the supply voltage to the part by v d . also note that the comparator reference, comparator output and le input are referenced to the v C pin. in order to preserve the precision of the reference and to avoid driving the comparator inputs below v C , r2 must connect to the v C pin. this will shift the amplifier output voltage up by v d . v outa can be accurately measured dif- ferentially across r1 and r2. the comparator output low voltage will also be shifted up by v d . the le pin thresh- old is referenced to the v C pin. in order to provide valid input levels to the lt6119 and avoid driving le below v C the negative supply of the driving circuit should be tied to v C . ? + v + v + v ? inc v ? 5 v d + ? v outa + ? 611912 f17 outa 8 9 6 v + v + sensehi LT6119-1 r in r sense i load v dd v dd senselo outc4 le 2 1 10 400mv reference r3 r1 r2 v dd ? + figure 17. schottky prevents damage during supply reversal 611912f lt 6119-1/lt 6119-2
25 for more information www.linear.com/LT6119-1 typical a pplica t ions electronic fuse and undervoltage detector with power-on reset the electronic fuse can be reset either by pulling the le line low or by cycling the power to the system. the circuit is designed to have a 100 s power-on period. after power, while le is still below the threshold, the comparator is kept transparent to allow for initial inrush current. the comparators monitor for overcurrent and undervolt - age conditions . if either fault condition is detected the battery will immediately be disconnected from the load. the latching comparator outputs ensure the battery stays disconnected from the load until an outside source resets the lt6119 comparator outputs. sensehi senselo outa 0.1 r10 100 LT6119-1 v ? to load v out 9.53k 50k 475 30v undervoltage detection 0.8a overcurrent detection inc1 inc2 v + le outc2 8 1 6 7 5 outc1 10 9 10k 100k 6.2v* irf9640 2 5v inc2 3 4 611912 ta02 100k 2n7000 *cmh25234b 1m 13.3k 0.1f 100nf 10f 40v 611912f lt 6119-1/lt 6119-2
26 for more information www.linear.com/LT6119-1 typical a pplica t ions mcu interfacing with hardware interrupts sensehi senselo outa 0.1 v + 100 LT6119-1 v ? to load v out adc in 2k 6.65k inc2 1.33k inc1 v + le outc1 8 1 7 6 5 outc2 10 9 10k 2 5v 4 3 le 611912 ta03 10k 5v v out /adc in atmega1280 pb0 pb1 pcint2 pcint3 adc2 pb5 5 6 7 2 3 1 undercurrent routine reset comparators mcu interupt outc2 goes low 5v 0v 611912 ta03b example: the comparators are set to have a 50 ma undercurrent threshold and a 300 ma overcurrent threshold. the mcu will receive the comparator outputs as hardware interrupts and immediately run an appropriate fault routine. simplified dc motor torque control the figure shows a simplified dc motor control circuit. the circuit controls motor current, which is proportional to motor torque; the lt6119 is used to provide current feedback to a difference amplifier that controls the current in the motor. the lt c ? 6992 is used to convert the output of the difference amp to the motors pwm control signal. sensehi senselo outa lt6119 v ? 5.62k 100k 2 3 7 ltc6246 1f 4 6 1 3 6 irf640 5v 1n5818 0.1 v motor 5 4 2 0.47f v out current set point (0v to 5v) 3.4k 1k inc2 1m 611912 ta04 1k 78.7k 100k 280k inc1 v + le outc1 outc2 le 100f + ? ltc6992-1 v + gnd 5v brushed dc motor (0a to 5a) mabuchi rs-540sh mod set out div 611912f lt 6119-1/lt 6119-2
27 for more information www.linear.com/LT6119-1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. p ackage descrip t ion ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661 rev e) msop (ms) 0307 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) 611912f lt 6119-1/lt 6119-2
28 for more information www.linear.com/LT6119-1 ? linear technology corporation 2014 lt 0314 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT6119-1 r ela t e d p ar t s typical a pplica t ion adc driving application part number description comments lt1787 bidirectional high side current sense amplifier 2.7v to 60v, 75v offset, 60a quiescent, 8v/v gain ltc4150 coulomb counter/battery gas gauge indicates charge quantity and polarity lt6100 gain-selectable high side current sense amplifier 4.1v to 48v, gain settings: 10, 12.5, 20, 25, 40, 50v/v ltc6101 high voltage high side current sense amplifier up to 100v, resistor set gain, 300v offset, sot-23 ltc6102 zero-drift high side current sense amplifier up to 100v, resistor set gain, 10v offset, msop8/dfn ltc6103 dual high side current sense amplifier 4v to 60v, resistor set gain, 2 independent amps, msop8 ltc6104 bidirectional high side current sense amplifier 4v to 60v, separate gain control for each direction, msop8 lt6105 precision rail-to-rail input current sense amplifier C0.3v to 44v input range, 300v offset, 1% gain error lt6106 low cost high side current sense amplifier 2.7v to 36v, 250v offset, resistor set gain, sot-23 lt6107 high temperature high side current sense amplifier 2.7v to 36v, C55c to 150c, fully tested: C55c, 25c, 150c lt6108 high side current sense amplifier with reference and comparator with shutdown 2.7v to 60v, 125v offset, resistor set gain, 1.25% threshold error lt6700 dual comparator with 400mv reference 1.4v to 18v, 6.5a supply current lt6109 high side current sense amplifier with reference and comparators with shutdown 2.7 v to 60v, 125v offset, resistor set gain, 1.25% threshold error lt6118 lt6108 without shutdown and por capability 2.7v to 60v, 200v, resistor set gain, 1.25% threshold error sensehi senselo outa 0.1 sense low sense high LT6119-1 v ? out 2k 0.1f 0.1f 6.65k inc2 1.33k overcurrent undercurrent inc1 v + le outc1 8 1 7 6 5 outc2 10 9 2 4 v cc v cc v ref 10k 3 le 611912 ta05 in v cc 10k in + ltc2470 comp to mcu 100 the low sampling current of the ltc2470 16- bit delta sigma adc is ideal for the lt6119. 611912f lt 6119-1/lt 6119-2

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